Digital filtering is widely used in digital signal processing (DSP) applications. In DSP, a sequence of digital samples (e.g., numbers represented in binary format) represents an actual analog signal within a system (e.g., a communications system). The samples are taken at a generally fixed rate, referred to as the sample rate. Conversion between the digital samples and analog signals can be performed by analog to digital converters (ADCs) for signals entering the DSP subsystem, and by digital to analog converters (DACs) for signals exiting the DSP subsystem.
In a number of DSP applications, finite impulse filters (FIR) are quite popular. An FIR filter is a feed-forward filter form, in which an impulse input results in a finite time duration filter output sequence. FIR filters are popular, in part, as a number of efficient filter implementation forms are known. Many different design techniques for FIR filters are also available, making FIR filters generally easy to design and integrate into a DSP application. Polyphase FIR filters are also known which can be used to perform sample rate conversions, such as decimating (downsampling) and interpolating (upsampling).
In contrast to an FIR filter, an infinite impulse response filter (IIR) uses a feed-back filter form, in which an impulse input results in an infinite time duration filter output sequence. IIR filters have been less frequently used in DSP due to a number of factors. One factor is that the use of feedback complicates the use of pipelining techniques sometimes used to increase throughput in DSP systems. Design tools and techniques for digital IIR filters have also lagged somewhat behind those available for digital FIR filters. IIR filters can, however, provide advantages over FIR filters in some applications. For example, an IIR filter can provide superior filter characteristics (e.g., ripple, transition bandwith, etc.) to an FIR filter using similar amounts of DSP resources.
In many applications (e.g. software defined radio technology used in communications systems) high digital filter processing rates are desired. Very high sample rates can present a number of challenges to the design of digital filters. For example, even when a low output rate of a filter is desired (e.g., because a high decimation factor is present), many input samples must be stored and processed by the filter. Conversely, an interpolating filter may have a low input sample rate, but be required to produce a high output sample rate. Thus, portions of a digital filter typically operate at either the input sample rate or the output sample rate.
Unfortunately, ADC and DAC speeds can outpace the processing rates achievable in some DSP chips (DSPCs) and field programmable gate arrays (FPGAs). While the processing speed of programmable gate arrays, custom hardware, and processors continues to improve each year, sample rate requirements and available ADC and DAC speeds have also been increasing. Thus, there is often a mismatch between the input or output samples rates desired, and the processing rates which can be achieved using straightforward DSP techniques.